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fix some coprocessor stuff

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ARM9
2015-07-24 21:24:31 +02:00
parent 6dc0a6ef28
commit 7934b63d57
2 changed files with 4 additions and 1 deletions
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syntax/include/armv6_base_syntax.vim
+2 -1
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@@ -13,7 +13,7 @@ exec 'syn match armv6Instr "\%(SH\?\|Q\|U[QH]\?\)\%(ADD16\|SUB16\|ADD8\|SUB8\|AS
exec 'syn match armv6Instr "\%(USAD8\|USADA8\|SSAT\|SSAT16\|USAT\|USAT16\)' . armCond . '\>"'
exec 'syn match armv6Instr "\%(MOVT\|MRA\|MAR\|MRRC2\|MCRR2\|ORN\|BFC\|BFI\|SBFX\|UBFX\)' . armCond . '\>"'
exec 'syn match armv6Instr "\%(MOVT\|MRA\|MAR\|ORN\|BFC\|BFI\|SBFX\|UBFX\)' . armCond . '\>"'
exec 'syn match armv6Instr "\%(PKHBT\|PKHTB\|SXTH\|SXTB16\|SXTB\|SXTAH\|SXTAB16\|SXTAB\|UXTH\|UXTB\|UXTB16\|UXTAH\|UXTAB16\|UXTAB\|RBIT\|REV\|REV16\|REVSH\|SEL\)' . armCond . '\>"'
@@ -23,6 +23,7 @@ exec 'syn match armv6LDR "\%(LDREX[HBD]\)' . armCond . '\>"'
exec 'syn match armv6STR "\%(STREX[HBD]\|CLREX\)' . armCond . '\>"'
syn match armv6InstrNoCond "\%(IT\|CBN\?Z\|TBB\|TBH\|CPSID\|CPSIE\|CPS\|SETEND\|SRS\%(IA\|IB\|DA\|DB\)\|RFE\%(IA\|IB\|DA\|DB\)\)\>"
syn keyword armv6InstrNoCond MRRC2 MCRR2
exec 'syn match armv7Instr "\%(DBG\|DMB\|DSB\|ISB\|SEV\|WFE\|WFI\|YIELD\)' . armCond . '\>"'