From c5eaf804fb26722fa38292f8240002cd7d1c6566 Mon Sep 17 00:00:00 2001 From: ARM9 Date: Fri, 3 Apr 2015 16:32:27 +0200 Subject: [PATCH] fixed bug that caused some armv4 instructions to not highlight --- syntax/armv5.vim | 2 +- syntax/include/arm_base_syntax.vim | 19 +------------------ syntax/include/armv5_base_syntax.vim | 20 ++++++++++++++++++++ 3 files changed, 22 insertions(+), 19 deletions(-) create mode 100644 syntax/include/armv5_base_syntax.vim diff --git a/syntax/armv5.vim b/syntax/armv5.vim index 769745d..598cc86 100644 --- a/syntax/armv5.vim +++ b/syntax/armv5.vim @@ -18,7 +18,7 @@ if version >= 508 || !exists("did_armv5_syntax_inits") command -nargs=+ HiLink hi def link endif - so :p:h/include/arm_base_syntax.vim + so :p:h/include/armv5_base_syntax.vim HiLink armv4Instr armv5Instructions HiLink armv5InstrCond armv5Instructions diff --git a/syntax/include/arm_base_syntax.vim b/syntax/include/arm_base_syntax.vim index 0a5933a..5800172 100644 --- a/syntax/include/arm_base_syntax.vim +++ b/syntax/include/arm_base_syntax.vim @@ -46,29 +46,12 @@ exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|BIC\|EOR\|MLA\|MOV\|MUL\|MVN\|NEG\ exec 'syn match armv4InstrCond "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"' -syn match armv4InstrNoCond "\%(ASR\|LSL\|LSR\|NOP\|POP\|PUSH\|ROR\|RRX\)\>" +syn match armv4InstrNoCond "\%(ASR\|LSL\|LSR\|NOP\|POP\|PUSH\|ROR\|RRX\)\>" exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"' exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"' exec 'syn match armv4Stack "\%(LDM\|STM\)' . armCond . '\%([ID][BA]\|[EF][DA]\)\>"' exec 'syn match armv4SWP "SWP' . armCond . 'B\?\>"' -" -" ARMv5 instructions -" - -exec 'syn match armv5InstrCond "\%(BLX\|CLZ\|MCRR\|MRRC\|QADD\|QSUB\|QDADD\|QDSUB\)' . armCond . '\>"' -HiLink armv4InstrCond armv5InstrCond - -syn match armv5InstrNoCond "\%(BKPT\|CDP2\|LDC2\|MCR2\|MRC2\|PLD\|STC2\)\>" -HiLink armv4InstrNoCond armv5InstrNoCond - -exec 'syn match armv5Mul "\%(SMLA\|SMLAL\|SMLAW\|SMUL\|SMULW\)[BT][BT]' . armCond . '\>"' - -exec 'syn match armv5LDR "\%(LDR\)' . armCond . 'D\>"' -exec 'syn match armv5STR "\%(STR\)' . armCond . 'D\>"' -HiLink armv4LDR armv5LDR -HiLink armv4STR armv5STR - "syn match armRelative "@R[0-7]\|@a\s*+\s*dptr\|@[ab]" diff --git a/syntax/include/armv5_base_syntax.vim b/syntax/include/armv5_base_syntax.vim new file mode 100644 index 0000000..9ae345e --- /dev/null +++ b/syntax/include/armv5_base_syntax.vim @@ -0,0 +1,20 @@ + +so :p:h/arm_base_syntax.vim + +" +" ARMv5 instructions +" + +exec 'syn match armv5InstrCond "\%(BLX\|CLZ\|MCRR\|MRRC\|QADD\|QSUB\|QDADD\|QDSUB\)' . armCond . '\>"' +HiLink armv4InstrCond armv5InstrCond + +syn match armv5InstrNoCond "\%(BKPT\|CDP2\|LDC2\|MCR2\|MRC2\|PLD\|STC2\)\>" +HiLink armv4InstrNoCond armv5InstrNoCond + +exec 'syn match armv5Mul "\%(SMLA\|SMLAL\|SMLAW\|SMUL\|SMULW\)[BT][BT]' . armCond . '\>"' + +exec 'syn match armv5LDR "\%(LDR\)' . armCond . 'D\>"' +exec 'syn match armv5STR "\%(STR\)' . armCond . 'D\>"' +HiLink armv4LDR armv5LDR +HiLink armv4STR armv5STR +